6-bit 1-Gsample/sec Analog-to-Digital Converter with Averaging Techniques

碩士 === 國立成功大學 === 電機工程學系碩博士班 === 93 ===  In this paper, a 6-bit 1Gsample/sec CMOS analog-to-digital converter is proposed. The application of the 6-bit A/D converter is targeted for using in a disk-drive read channel. A flash structure is adopted to implement the high-speed A/D converter. Using a fu...

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Bibliographic Details
Main Authors: Cheng-Hsiung Liao, 廖政雄
Other Authors: Ching-Chun Wang
Format: Others
Language:zh-TW
Published: 2005
Online Access:http://ndltd.ncl.edu.tw/handle/21220224261730448503