Floorplanning for Uncertain Modules by Using Sequence-Pair Representation

碩士 === 大葉大學 === 電機工程學系碩士班 === 93 === Floorplanning is an important issue in the physical design phase of the VLSI design. As VLSI design hierarchy becomes more complex, it is difficult to immediately send obtained floorplanning information back to frontend system level designer for modifying modules...

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Bibliographic Details
Main Authors: Yu-Lin Chiang, 江昱麟
Other Authors: Jong-Sheng Cherng
Format: Others
Language:zh-TW
Published: 2005
Online Access:http://ndltd.ncl.edu.tw/handle/97889800083699460301