Retiming Transformation with Considering Race Conditions
碩士 === 中原大學 === 電子工程研究所 === 93 === Retiming transformation relocates registers in a circuit to shorten the clock cycle time. However, with the advent of deep sub-micron era, the hold constraints often limit the smallest feasible clock period that the retiming transformation can achieve. Therefo...
| Main Authors: | , |
|---|---|
| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2005
|
| Online Access: | http://ndltd.ncl.edu.tw/handle/26ta32 |