Low-Complexity Bit-Parallel Multiplier Architecture over Finite Field GF(2^m)
博士 === 長庚大學 === 電機工程研究所 === 93 === The design of an efficient arithmetic circuit over finite field is an extensive research topic in error control coding and cryptography. In 1989, based on the polynomial (standard) basis, Itoh and Tsujii proposed two low-complexity multipliers for a class of finite...
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| Format: | Others |
| Language: | en_US |
| Published: |
2005
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| Online Access: | http://ndltd.ncl.edu.tw/handle/80469861107530433740 |