Analysis and Design of CMOS PWCL/DLL and PLL
博士 === 國立臺灣大學 === 電機工程學研究所 === 92 === As the technology continuously scaling down, the short channel effects and the presence of the voltage, process, and temperature variations make the circuit hard to design. For solving these problems, the feedback technique is widely used. To acquire the clock...
| Main Authors: | , |
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| Format: | Others |
| Language: | en_US |
| Published: |
2004
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| Online Access: | http://ndltd.ncl.edu.tw/handle/40301951075445192192 |