Design of Time domain Equalizer (TEQ) for VDSL system
碩士 === 國立交通大學 === 電機與控制工程系所 === 92 === In this paper, we propose a semi-blind TEQ design method for VDSL system. In the VDSL system FDD(Frequency Division Duplex) is used to separate upstream and downstream signals. In downstream(upstream) transmission the upstream(downstream) tones are not used and...
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Format: | Others |
Language: | en_US |
Published: |
2004
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Online Access: | http://ndltd.ncl.edu.tw/handle/85181476576292058738 |
Summary: | 碩士 === 國立交通大學 === 電機與控制工程系所 === 92 === In this paper, we propose a semi-blind TEQ design method for VDSL system. In the VDSL system FDD(Frequency Division Duplex) is used to separate upstream and downstream signals. In downstream(upstream) transmission the upstream(downstream) tones are not used and are referred as null tones. If the channel orderis larger than the length of cyclic prefix, the null tone will contains the noise and ISI. The proposed TEQ design method exploit the null tone energy to shorten the channel. The design does not require the channel impulse response. Examples will be given to
show that the method can design TEQ with good shortening effect.
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