Design of Time domain Equalizer (TEQ) for VDSL system
碩士 === 國立交通大學 === 電機與控制工程系所 === 92 === In this paper, we propose a semi-blind TEQ design method for VDSL system. In the VDSL system FDD(Frequency Division Duplex) is used to separate upstream and downstream signals. In downstream(upstream) transmission the upstream(downstream) tones are not used and...
Main Authors: | , |
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Other Authors: | |
Format: | Others |
Language: | en_US |
Published: |
2004
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Online Access: | http://ndltd.ncl.edu.tw/handle/85181476576292058738 |