The Fabrication and Characterization of High Performance Laser-annealed Polycrystalline Silicon Thin-Film Transistors with an Ultra-Thin Amorphous-Silicon Layer
碩士 === 國立交通大學 === 電子工程系所 === 92 === In this thesis, the characteristics of excimer laser annealed low temperature polycrystalline silicon TFT's with/without an ultra-thin a-Si layer have been investigated and compared. With capping an appropriate ultra-thin a-Si layer, the surface roughness of...
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ndltd-TW-092NCTU54270422019-05-15T19:38:01Z http://ndltd.ncl.edu.tw/handle/dq74v8 The Fabrication and Characterization of High Performance Laser-annealed Polycrystalline Silicon Thin-Film Transistors with an Ultra-Thin Amorphous-Silicon Layer 具有超薄非晶矽層之高效能雷射退火複晶矽薄膜電晶體之製作與特性研究 Hsueh-Jen Yang 楊學人 碩士 國立交通大學 電子工程系所 92 In this thesis, the characteristics of excimer laser annealed low temperature polycrystalline silicon TFT's with/without an ultra-thin a-Si layer have been investigated and compared. With capping an appropriate ultra-thin a-Si layer, the surface roughness of laser-annealed channel is not only decreased, but also the On/Off current ratio is improved about one order without extra mask step and kink effect is further suppressed. We also find that the optimum thickness of capping ultra-thin a-Si layer is about 5-nm. In our study, the On/Off ratio is rose from 4.15 x 104 to 3.45 x 105 for Vds = 5 V, Threshold voltage slightly shift to 2.43 V and RMS surface roughness of channel can be improved to 8.52-nm. And it has better hot-carrier stress endurance than conventional TFTs without an ultra-thin a-Si layer. Kow-Ming Chang Cheng-May Kwei 張國明 桂正楣 2004 學位論文 ; thesis 27 en_US |
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碩士 === 國立交通大學 === 電子工程系所 === 92 === In this thesis, the characteristics of excimer laser annealed low temperature polycrystalline silicon TFT's with/without an ultra-thin a-Si layer have been investigated and compared. With capping an appropriate ultra-thin a-Si layer, the surface roughness of laser-annealed channel is not only decreased, but also the On/Off current ratio is improved about one order without extra mask step and kink effect is further suppressed. We also find that the optimum thickness of capping ultra-thin a-Si layer is about 5-nm. In our study, the On/Off ratio is rose from 4.15 x 104 to 3.45 x 105 for Vds = 5 V, Threshold voltage slightly shift to 2.43 V and RMS surface roughness of channel can be improved to 8.52-nm. And it has better hot-carrier stress endurance than conventional TFTs without an ultra-thin a-Si layer.
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Kow-Ming Chang |
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Kow-Ming Chang Hsueh-Jen Yang 楊學人 |
author |
Hsueh-Jen Yang 楊學人 |
spellingShingle |
Hsueh-Jen Yang 楊學人 The Fabrication and Characterization of High Performance Laser-annealed Polycrystalline Silicon Thin-Film Transistors with an Ultra-Thin Amorphous-Silicon Layer |
author_sort |
Hsueh-Jen Yang |
title |
The Fabrication and Characterization of High Performance Laser-annealed Polycrystalline Silicon Thin-Film Transistors with an Ultra-Thin Amorphous-Silicon Layer |
title_short |
The Fabrication and Characterization of High Performance Laser-annealed Polycrystalline Silicon Thin-Film Transistors with an Ultra-Thin Amorphous-Silicon Layer |
title_full |
The Fabrication and Characterization of High Performance Laser-annealed Polycrystalline Silicon Thin-Film Transistors with an Ultra-Thin Amorphous-Silicon Layer |
title_fullStr |
The Fabrication and Characterization of High Performance Laser-annealed Polycrystalline Silicon Thin-Film Transistors with an Ultra-Thin Amorphous-Silicon Layer |
title_full_unstemmed |
The Fabrication and Characterization of High Performance Laser-annealed Polycrystalline Silicon Thin-Film Transistors with an Ultra-Thin Amorphous-Silicon Layer |
title_sort |
fabrication and characterization of high performance laser-annealed polycrystalline silicon thin-film transistors with an ultra-thin amorphous-silicon layer |
publishDate |
2004 |
url |
http://ndltd.ncl.edu.tw/handle/dq74v8 |
work_keys_str_mv |
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