Electrical and Physical Characteristics of MOD and Sputter Deposited Strontium Bismuth Tantalate Films for NV-FRAM Applications

• Main Authors: Chia-Hsing Huang, 黃加星
• Other Authors: Tseung-Yuen Tseng
• Format: Others
• Language: zh-TW
• Published: 2003
• Online Access: http://ndltd.ncl.edu.tw/handle/50126554067890514552

博士 === 國立交通大學 === 電子工程系 === 92 === Recently, the one-transistor ferroelectric random access memory (1T FeRAM) has gained intensive interest because it can provide very high-density non-volatile memories with non-destructive read-out operation. The 1T FeRAM is composed of the ferroelectric memory field effect transistor (FeMFET), where the ferroelectric materials are used to replace the gate oxide of the MOSFET. The polarization in both directions stored in the ferroelectrics can change the threshold voltages of the transistors, and in turn the drain current difference of the two states can be identified as logical states “1” or “0” in a memory. In this study, we investigate the ferroelectric memory filed effect transistor (FeMFET) using the ferroelectric material, Strontium Bismuth Tantalate (SBT) and forming the metal — ferroelectric — metal (MFM) for tests of SBT properties and preparing metal — ferroelectric —insulator — semiconductor (MFIS) and metal — ferroelectric — metal — insulator — semiconductor (MFMIS) for 1T memory test. The fluorite-like Sr0.8Bi2.6Ta2O9 (SBT) thin films spin-coated on Ir/SiO2/p-type Si substrates using the metal-organic decomposition (MOD) technique are prepared at 450℃ under various annealing times and the electrical properties and reliabilities are discussed in the Chapter 3. The polarization versus electric field (P-E) behavior of SBT thin films pyrolyzed and annealed at 450℃ for 60 min was linear with dielectric constant of 100. The 450℃ annealed films have the leakage current density of about 410-8 A/cm2 at 200 kV/cm. The dependence of cumulative failure on dielectric breakdown field and time-dependent dielectric breakdown studies for these paraelectric SBT films indicated that the longer the annealing time, the better the breakdown field, whereas the film with no annealing treatment had a lifetime of over 10 yrs on operation at the electric field of 0.8 MV/cm. However, in the Chapter 4, a well-shaped hysteresis loop with of 8.8 C/cm2 is obtained using Pt as top and bottom electrodes for the MOD-derived SBT films annealed at 750℃ in O2 ambient for 1min. About reliability issues, these 750℃ SBT films show no fatigue characteristic till at least 109 cycles and the retention can hold at least 10000 s using MFM structure. Using rf sputtered ferroelectric Sr0.8Bi2.5Ta1.2Nb0.8O9 thin films on SiO2/Si and Si substrates with different oxygen mixing ratios (OMR, O2/(Ar+O2)) and at various deposition temperatures, we inspect the memory properties of MFS and MFIS structures in the Chapter 5. The lower temperature and the higher OMR used in film processing lead to reduction in the leakage current densities and widening the memory window of the resultant metal-ferroelectric-insulator-semiconductor (MFIS) structures. The maximum memory windows of the MFIS structures based on 40﹪OMR SBTN films deposited at 500℃ on SiO2/Si substrate are 2.87 and 2.27 V at the bias amplitudes of 10 and 8V, respectively. With increasing applied voltage, the memory window also increases. The memory window decreases from 2.27 to 1.59 V after the 1011 switching cycles at a bias amplitude of 8 V. The capacitance difference, △C, between the two states decreases by 48﹪after retention time of 7000 s. Using MOD-derived SrBi2Ta2O9 film with different annealing temperature and time on the ultra-thin Si3N4 buffer layer, we examine the electrical properties of MFIS in the Chapter 6. In an attempt to operate at low voltage with sufficient large memory window, various ultra thin Si3N4 buffer layers in thickness of 3.5, 2, and 0.9nm were employed. From the results of C-V measurements, the memory window can be as large as 0.8V at the bias amplitude of 5 V for the sample with 0.9 nm SixNy buffer layer. The leakage current, which plays a very important role in the data retention, of Pt/SBT (245nm)/ Si3N4 (0.9nm)/p-Si (100) can be as low as 2.5 x 10-8 A/cm2 at 200kV/cm. Excellent fatigue-free performance with up to 1010 read/write cycles and good retention time of >2hr have been obtained. Using various thicknesses of MOD-derived SrBi2Ta2O9 film with different annealing temperature and time and CeO2 or SrTiO3 insulator, we study the memory properties for MFIS and MFMIS applications which have been fabricated by our three-mask lithography process in the Chapter 7. A suitable memory window width of the value 0.95V under a sweeping voltage 6V can be obtained from our MFIS capacitors using CeO2 films as insulator (I) layers. As the area ratio (AF:AI) of MFMIS capacitors decreases, the memory windows can increase up to 2.7V under a sweeping voltage 5V. The retention characteristics of MFIS and MFMIS capacitors are poor in our experiments. The reasons are discussed in the text. Finally, we will summary the results of my studies in this thesis and make some suggestions in the future work.