An Aggressive Memory Controller with Dynamic Access Scheduling and Bank Precharge Strategies
碩士 === 國立成功大學 === 電機工程學系碩博士班 === 92 === System performance becomes increasingly limited by memory bandwidth in contemporary System-on-Chip designs. In this thesis, we present memory access scheduling and bank precharge strategies for current DRAM operations. The simulated system models an MPEG4 enco...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2004
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| Online Access: | http://ndltd.ncl.edu.tw/handle/39393406168371020340 |