A 6-bit 1-Gsample/sec Analog-to-Digital Converter

碩士 === 國立成功大學 === 電機工程學系碩博士班 === 92 ===   This thesis proposes a 6-b 1G-sample/sec A/D Converter. The converter is suitable to optical (magnetic) read-channel and high-speed Ethernet chips. The flash structure is adopted to accomplish the requirement of higher speed. Moreover, system performance is...

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Bibliographic Details
Main Authors: Jian-Fu Wu, 吳健福
Other Authors: Keh-la Lin
Format: Others
Language:zh-TW
Published: 2004
Online Access:http://ndltd.ncl.edu.tw/handle/68256508837993563560