An Asymmetrical Split Floating Gate Flash Memory Cell for Multi-Level Operation
碩士 === 國立中興大學 === 電機工程學系 === 92 === Abstract A memory cell storing more than one bit per cell is termed multilevel memory. Several techniques to implement multilevel flash cells have been proposed. The first category consists of controlling the amounts of charge stored in the single float...
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2004
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| Online Access: | http://ndltd.ncl.edu.tw/handle/63887979460726149718 |