| Summary: | 碩士 === 長庚大學 === 電子工程研究所 === 92 === Recently, the flash memory has become one of the mainstream of nonvolatile semiconductor memory product, which has been widely used for mass data storage. In the past, for the design of advanced flash memories, low power consumption is a major concern. Also, the performance and reliability are two major focuses in the flash memory design. This thesis will be focused on studying a new cell structure called BiAND and its endurance and data retention characteristics.
In this thesis, two major topics have been studied. First, we discuss the degradation of tunnel oxide reliability for flash cells after program/erase cycles with channel F-N operation scheme. The DCIV measurement and charge pumping measurement have been applied to analyze the reliability of flash memories. Based on the experimental results, we know that after several program/erase cycling, the ability of data retention will be degraded as a result of the generated oxide traps and interface traps. The enhancement of device degradation is due to the damage in the channel interface caused by the P/E cycling, which will further affect the program/erase speed.
Secondly, a new flash cell called buried bit-line AND (BiAND) is proposed. Buried bit-line AND flash can achieve low voltage programming/erase. The biggest difference from the conventional AND flash is the bit-line contact. With the use of the buried bit-line, the required high program/erase voltage for FN tunneling can be divided between the word-line and bit-line. Further, we compared the reliability for different schemes, i.e., high voltage F-N (HV F-N) and Bi F-N operation schemes. Results show that BiAND scheme gives much better endurance and data retention characteristics. This makes it successful for a low voltage and high reliability design.
|
|---|
