Using the CPLD-Based to enhance processor's calculate performance
碩士 === 國立雲林科技大學 === 電機工程系碩士班 === 91 === The purpose of this thesis is to enhance processor’s calculate performance. Using VHDL to write calculation theorem for special function. Compare the soft simulation and operation result of practical , that can verify the calculation theorem of hardware , wh...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2003
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| Online Access: | http://ndltd.ncl.edu.tw/handle/28743375520408644501 |