Design of The Low voltage Concurrent Dual-Band CMOS LNA
碩士 === 大同大學 === 電機工程研究所 === 91 === With the scaling down of CMOS technology, it has become a new trend to design a CMOS IC with low cost, low power and high integration. Therefore, in this thesis we employ TSMC CMOS 0.25 m process to design a concurrent dual band low noise amplifier (LNA)...
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| Format: | Others |
| Language: | en_US |
| Published: |
2003
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| Online Access: | http://ndltd.ncl.edu.tw/handle/31257043826615872929 |