Compiling Activity Diagrams into Self-Timed systems in VHDL
碩士 === 大同大學 === 資訊工程研究所 === 91 === System-on-a-chip (SOC) design with IP (Intellectual Property) reuse becomes a key factor of IA design, and enables system or chip designer to increase the performance of the chip and decrease the time to market. There are many mature synchrono...
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| Format: | Others |
| Language: | en_US |
| Published: |
2003
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| Online Access: | http://ndltd.ncl.edu.tw/handle/48680199022907561042 |