CMOS Analog Circuit Layout Design Automation
碩士 === 國立成功大學 === 電機工程學系碩博士班 === 91 === Layout design is a very important step in the analog CMOS IC design flow. Good layout quality should feature low susceptibility to digital noise and low sensitivity to process variation. It has historically been a time-consuming, manual task. The fast growth o...
| Main Authors: | , |
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| Format: | Others |
| Language: | en_US |
| Published: |
2003
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| Online Access: | http://ndltd.ncl.edu.tw/handle/62541285242114704365 |