A Study of Architecture Design for Speech Recognition and Compression
博士 === 國立成功大學 === 電機工程學系碩博士班 === 91 === In this dissertation, we propose several VLSI architectures and implementation for the speech recognition and compression systems. In the first part, the first chip for speech features extraction based on MFCC algorithm is proposed. The chip is implemented a...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2002
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| Online Access: | http://ndltd.ncl.edu.tw/handle/81252717595769253999 |