A Low-Voltage Embedded 4N SRAM
碩士 === 輔仁大學 === 電子工程學系 === 91 === This work describes a smart hidden refresh scheme for designing embedded 4N SRAM. An improved dynamic NOR decoder is also presented to achieve high-speed and low-power operation at low supply voltage. The smart refresh scheme can overcome the performance...
Main Authors: | , |
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Other Authors: | |
Format: | Others |
Language: | zh-TW |
Published: |
2003
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Online Access: | http://ndltd.ncl.edu.tw/handle/01708746894740564592 |