Design and Analysis of a Novel All Digital Phase-Locked Loop
碩士 === 淡江大學 === 電機工程學系 === 90 === Recently, phase-locked loop (PLL) has been widely used in the field of computers and communications systems applications such as frequency synthesizer, data recovery circuit, and delay de-skewing. In the tradition PLL scheme, a low-pass filter (LPF) consi...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2002
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| Online Access: | http://ndltd.ncl.edu.tw/handle/51110173758933390178 |