An 8-bit 100MHz Fully Differential Sample-and-Hold Circuit
碩士 === 國立清華大學 === 電子工程研究所 === 90 === This thesis describes a 100MHz, 8-bit resolution CMOS fully differential sample-and-hold circuit under 1.8V operation voltage. The circuit is composed of a high-speed operational amplifier, capacitors, MOS transistor switches, and a high voltage genera...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2002
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| Online Access: | http://ndltd.ncl.edu.tw/handle/07832355470498115665 |