Design and Reliability Analysis of Wafer Level Package with Bubble-Like Buffer Layer

• Main Authors: Chang-Chun Lee, 李昌駿
• Other Authors: Kuo-Ning Chiang
• Format: Others
• Language: zh-TW
• Published: 2002
• Online Access: http://ndltd.ncl.edu.tw/handle/98393506379282574601

碩士 === 國立清華大學 === 動力機械工程學系 === 90 === Recent years, semiconductor chip applied on the computer and optical communication products need to satisfy the demands of smaller, lighter, high I/O density and lower cost. The next generation packages such as CSP, flip chip and wafer level package（WLP）have enjoyed the mainstream. However, the WLP is only suitable to smaller chip in current because the board level reliability for larger one is still critical. In order to enhance the WLP reliability for larger chip, this research proposed a new WLP design ─ bubble-like buffer layer WLP. Compared to other types of package, it has a novel packaging structure with the bubble-like plate. The research studies the effects of the dimensions and material properties of bubble-like plate and buffer layer on the WLP reliability. A 2-D nonlinear finite element analysis for the proposed new WLP is conducted. The results reveal that both bubble-like plate and buffer layer provide compliant effects. However, the buffer layer has a significant effect on enhancing the solder joint reliability. Moreover, if packages have the buffer structure, the chip thickness does not impact its reliability. On the other hand, the difference between the no-filled and filled buffer layers also affect the reliability of solder joint. The results reveal the package with the buffer layer and the no-filled bubble-like plate has the better reliability. Compared to the no-filled bubble-like plate, the buffer layer can enhance the package reliability further. Furthermore, the results presented in the research can be used as a design guideline for bubble-like buffer layer WLP.