Study of High Drivability Word Line Driver and High Speed Sense Amplifier for a Low VoltageDynamic Random Access Memory
碩士 === 國立中山大學 === 電機工程學系研究所 === 90 === Three high speed circuit schemes for a low supply voltage DRAM are presented in this thesis. First, a high drivability bootstrapped word line driver is proposed. We use one boosting circuit collocating an NMOS to serve as the pulling up device rather than...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2002
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| Online Access: | http://ndltd.ncl.edu.tw/handle/28524278319236484681 |