High Speed Serial Link for Inter-Chip Communication
碩士 === 國立中央大學 === 電機工程研究所 === 90 === Due to process technologies scale-down, the operating frequency and circuit complexity of CMOS VLSI increase. The growing gap between on-chip gates and off-chip I/O bandwidth is reaching the critical proportions. Therefore, the interconnects between chips often...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2002
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| Online Access: | http://ndltd.ncl.edu.tw/handle/89010697187955718334 |