A 6-bit 1GSample/s Analog-to-Digital Converter for Read Channel
碩士 === 國立交通大學 === 電子工程系 === 90 === A 6-bit 1-GSample/s fully differential CMOS flash analog-to-digital converter for read channel is described is this thesis. To achieve the goal of no-idle time for self-calibration of A/D converter, the conventional auto-zeroing scheme is replaced by ave...
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| Format: | Others |
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2002
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| Online Access: | http://ndltd.ncl.edu.tw/handle/60345852330935405936 |