A study of ESD protected circuit design and latch up effect immunity
碩士 === 大葉大學 === 電機工程研究所 === 90 === Following the integrated circuit package density increasing, the dimension of device also shirk. The device channel length of integrated circuit down to deep submicron 0.1μm process or even smaller. Reliability engineer always play a very important role in integr...
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2002
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| Online Access: | http://ndltd.ncl.edu.tw/handle/07336705867896023430 |