Design of Efficient VLSI Architectures:Multiplier, 2-D Digital Filter, and Adaptive Digital Filter
博士 === 國立臺灣大學 === 電機工程學研究所 === 89 === In this dissertation, we propose several efficient very-large-scale-integration (VLSI) architectures and algorithms including fixed-width multipliers, two-dimensional (2-D) digital filter, and delay least-mean-square (DLMS)-based as well as recursive-...
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| Format: | Others |
| Language: | en_US |
| Published: |
2001
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| Online Access: | http://ndltd.ncl.edu.tw/handle/21849845445622361753 |