Compression Scheme for waveform of Hardware Design Verification
碩士 === 國立臺灣大學 === 資訊工程學研究所 === 89 === Abstract Among VLSI circuit design, functional verification has become an important part due to rapid extension of circuits functionalities in many consumer and industry products. During circuit simulation, a very large trace file is writte...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2001
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| Online Access: | http://ndltd.ncl.edu.tw/handle/27107029715915719378 |