A +3.3V Low Voltage Differential Signaling (LVDS) Transmitter for Flat Panel Display (FPD) Link
碩士 === 國立清華大學 === 電子工程研究所 === 89 === A Low-Voltage-Differential-Signaling transmitter is implemented in TSMC 0.35 1P4M CMOS process to convert 8 bits of CMOS/TTL data into one LVDS data stream. A phase-locked transmit clock is transmitted in parallel with the data stream over a second LV...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2001
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| Online Access: | http://ndltd.ncl.edu.tw/handle/85797148210018702644 |