Performance-Driven Synthesis Using Gate-Labeled Retiming

博士 === 國立清華大學 === 資訊工程學系 === 89 === In this dissertation, we study the circuit retiming problem. We utilize a gate-labeling method to enhance retiming efficiency and integrate with other synthesis tasks. We propose a retiming system that links to layout, an approach for simultaneous reti...

Full description

Bibliographic Details
Main Authors: Tzu-Chieh Tien, 田子杰
Other Authors: Youn-Long Lin
Format: Others
Language:en_US
Published: 2001
Online Access:http://ndltd.ncl.edu.tw/handle/23366155290810352907