Study on Integration of Porous Low Dielectric Constant Material

碩士 === 國立交通大學 === 電子工程系 === 89 === As ULSI circuits are scaled down to deep submicrom regime, interconnect delay becomes increasingly dominant over intrinsic gate delay. To reduce the RC delay time, many low dielectric constant materials have been developed. Using low dielectric constant...

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Bibliographic Details
Main Authors: Chun-Huai Li, 李純懷
Other Authors: Simon M. Sze
Format: Others
Language:en_US
Published: 2001
Online Access:http://ndltd.ncl.edu.tw/handle/35365231940520808775
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Summary:碩士 === 國立交通大學 === 電子工程系 === 89 === As ULSI circuits are scaled down to deep submicrom regime, interconnect delay becomes increasingly dominant over intrinsic gate delay. To reduce the RC delay time, many low dielectric constant materials have been developed. Using low dielectric constant materials as inter-metal dielectric, the ICs will work at high speed, low power dissipation, and low cross-talk noise. Among of various low dielectric materials, porous silica films are promising candidates for advanced interconnect systems. The adjustable dielectric property makes porous silica suitable for different IC technology nodes. In this study, the intrinsic properties such as fundamental physical, electrical, and thermal properties of the porous silica have been investigated. The compatibility of the porous silica with integration processes also has been studied comprehensively. We have proposed dry and wet treatments to improve the dielectric properties of porous silica after photoresist stripping. Material and electrical analyses were used to interpret these improvements. Finally, we have also explored the reliability issue related to copper penetration in porous silica film.