Study on Integration of Porous Low Dielectric Constant Material
碩士 === 國立交通大學 === 電子工程系 === 89 === As ULSI circuits are scaled down to deep submicrom regime, interconnect delay becomes increasingly dominant over intrinsic gate delay. To reduce the RC delay time, many low dielectric constant materials have been developed. Using low dielectric constant...
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| Format: | Others |
| Language: | en_US |
| Published: |
2001
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| Online Access: | http://ndltd.ncl.edu.tw/handle/35365231940520808775 |