Research and Development of A Hierarchical Interface Design methodology and models for SoC IP Integration- using MP3 design as a case
碩士 === 國立成功大學 === 電機工程學系 === 89 === A key aspect of an IP core’s marketability, soft or hard, is its ability to be easily integrated across a wide variety of buses. To active such interface, we separating core’s interface from its internals, and present an effective interface architecture...
Main Authors: | , |
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Other Authors: | |
Format: | Others |
Language: | zh-TW |
Published: |
2001
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Online Access: | http://ndltd.ncl.edu.tw/handle/38878959194918615044 |