Liquid Phase Deposited SiO2 on GaN and Its Application to MOSFET

• Main Authors: Hou-Run Wu, 吳厚潤
• Other Authors: Yeong-Her Wang
• Format: Others
• Language: en_US
• Published: 2001
• Online Access: http://ndltd.ncl.edu.tw/handle/78553210133359852884

碩士 === 國立成功大學 === 電機工程學系 === 89 === In this dissertation, we have demonstrated an efficient and low cost approach to deposit oxide layers by liquid phase deposited silicon oxide (LPD) at low temperature (40℃). The oxidation system is quite simple. GaN wafers are only immersed into a H2SiF6 and H3BO3 solution to form the oxide layer. The LPD oxidation rate is about 50nm/hr. The surface morphologies are investigated by atomic force microscopy (AFM) and scanning electron microscopy (SEM), respectively. X-ray photoelectron spectroscopy (XPS), Auger electron spectroscopy (AES), Secondary ion mass spectrometer (SIMS) and Fourier-transform infrared spectrometer (FTIR) to analyze the chemical composition. The interface trap density is about 2.8×1011cm-2eV-1, breakdown field ranges from 3 to 4MV/cm and leakage current density is about 10-4A/cm2 at 1MV/cm electric field when oxide thickness is about 50~55nm. After annealing at 900℃, we can obtain interface trap density is 1.9×1011cm-2eV-1, leakage current density is lowered to 10-7A/cm2 at 1MV/cm electric field and 8~10MV/cm.breakdown field. A selective oxidation process by using LPD method to fabricate n-channel depletion-mode GaN MOSFET is proposed. The transconductance is about 40mS/mm when Vgs=4V and Vds=15V. AlGaN/GaN based depletion mode MOS-HFET was also demonstrated by using LPD-silicon oxide as the gate dielectric. The transconductance is about 78mS/mm when Vgs=-7.6V and Vds=12V. Idss=700mA/mm when Vgs=0V.