A study of flat superfinishing silicon wafer

碩士 === 華梵大學 === 機電工程研究所 === 89 === The purpose of this paper is to investigate the influence of the diamond grain size, the spindle speed, the workpiece speed, and the operating pressure of the vertical flat superfinishing silicon wafer on the roughness, total thickness variation and resistance rate...

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Bibliographic Details
Main Authors: Ko-Chang Chen, 陳谷全
Other Authors: Shenq-Yih Luo
Format: Others
Language:zh-TW
Published: 2001
Online Access:http://ndltd.ncl.edu.tw/handle/06330614765595418903
Description
Summary:碩士 === 華梵大學 === 機電工程研究所 === 89 === The purpose of this paper is to investigate the influence of the diamond grain size, the spindle speed, the workpiece speed, and the operating pressure of the vertical flat superfinishing silicon wafer on the roughness, total thickness variation and resistance rate. The self-designed "Assembled Super-Precision Grinding Tool" is used to carry out a series of machining and the Taguchi-Method is also used to study the relationship among the operating parameters. The results of experiment show that the diamond grain size and the spindle speed of the vertical flat superfinishing for the roughness and resistance rate obtained are a significant effect. When the smaller diamond grit size, the faster spindle speed, the faster speed of the rotatory table, and the smaller operating pressure in the superfinishing are employed, the trajectory produced by the grains is denser and the chip thickness and the depth of cut are smaller, which cause the silicon wafer to produce the higher degree of the ductile grinding. This will lead the wafer surface to produce the smaller amount and size of the pits, thereby generating the lower surface roughness and resistance rate. In addition, the center site of the wafer obtained is the smaller amount and size of the pits than the circumference of the wafer, which produces the better surface roughness and the lower resistance rate. After polishing of the wafer, the total thickness variation(TTV)obtained is significantly subjected to the effect of the thermal deformation of the wafer carrier and the accuracy of the machine device. In the meantime, TTV increases with the increase of the polishing time. It is because the heat in the superfinishing concentrates on the center of silicon wafer, which causes the expansion of the center of the wafer, this will lead the center site’s materials to be removed the larger amount. It will make the center area to produce the concave, hence obtaining a larger TTV. KEYWORD: Flat Superfinishing, Silicon Wafer, Roughness, Resistance Rate, TTV.