Design,optimization of CCU32 and integrated Cache design
碩士 === 國立中正大學 === 電機工程研究所 === 89 === In order to achieve the demand of low power consumption of SOC, in this thesis we propose a cell library which can work under the 0.5/0.9 voltage circumstances and we use TSMC 0.25μm process to create this cell library.Beside of the technique of lowing...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2001
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| Online Access: | http://ndltd.ncl.edu.tw/handle/93185986281465779773 |