Partitioning and Pseudo-Exhaustive Testing of VLSI Circuits Using Scan-Tree Test Architecture
博士 === 國立中正大學 === 資訊工程研究所 === 89 === In this thesis, we first presents a new test architecture, called TLS (Tree-LFSR/SR), to more effectively generate pseudo-exhaustive test patterns for both combinational and sequential VLSI circuits. Instead of using a single scan...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2000
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| Online Access: | http://ndltd.ncl.edu.tw/handle/62978614102159904696 |