Design of an ATM Chip with IRR Scheduling
碩士 === 國立中正大學 === 電機工程研究所 === 88 === ATM network is an ideal broadband network platform rewards to work for, this thesis proposes a practical hardware architecture that integrates ATM layer and ATM adaptation layer functions - AAL5 of ATM network protocol. It also supports multiple I/O ports and has...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2000
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| Online Access: | http://ndltd.ncl.edu.tw/handle/04131212152874267037 |