Modeling of Gate-Induced Drain Leakage Currents of MOSFETs
碩士 === 國立臺灣科技大學 === 電子工程系 === 87 === In this thesis we present compact drain leakage current models for submicron surface-channel nMOSFETs, buried-channel MOSFETs and silicon-on-insulator pMOSFETs. The analytical and physics-based models were developed using a quasi-two dimensional ap...
Main Authors: | Hao-Hsun Lin, 林浩勳 |
---|---|
Other Authors: | Sheng-Lyang Jang |
Format: | Others |
Language: | en_US |
Published: |
1999
|
Online Access: | http://ndltd.ncl.edu.tw/handle/67665048667196830973 |
Similar Items
-
Charaterization and Modeling of Gate-Induced Drain Leakage Current in Thin Oxide MOSFET
by: E-Long Lee, et al.
Published: (1993) -
Asymmetric gate induced drain leakage and body leakage in vertical MOSFETs with reduced parasitic capacitance
by: Gili, E., et al.
Published: (2006) -
The impact of poly gate sidewall oxide thickness on MOSFET’s gate-induced drain leakage behavior
by: Huang Tao Kun, et al.
Published: (2005) -
An analytical drain current model for symmetric double-gate MOSFETs
by: Fei Yu, et al.
Published: (2018-04-01) -
A Simulation-based Drain Leakage Current for Band-to-Band Tunneling in Single-Gate and Double-Gate n-MOSFET
by: Ting-Yao Huang, et al.
Published: (2005)