Modeling of Gate-Induced Drain Leakage Currents of MOSFETs

碩士 === 國立臺灣科技大學 === 電子工程系 === 87 === In this thesis we present compact drain leakage current models for submicron surface-channel nMOSFETs, buried-channel MOSFETs and silicon-on-insulator pMOSFETs. The analytical and physics-based models were developed using a quasi-two dimensional ap...

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Bibliographic Details
Main Authors: Hao-Hsun Lin, 林浩勳
Other Authors: Sheng-Lyang Jang
Format: Others
Language:en_US
Published: 1999
Online Access:http://ndltd.ncl.edu.tw/handle/67665048667196830973