The Designs and Analyses of Parallel Algorithms for Some Problems on Special Graphs
碩士 === 國立臺灣師範大學 === 資訊教育研究所 === 87 === A processor array with reconfigurable bus system (abbreviated to PARBS) is a parallel computation model that consists of a processor array and a reconfigurable bus system. In this model, we can dynamically setup the configurations of all processors i...
| Main Authors: | , |
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| Format: | Others |
| Language: | zh-TW |
| Published: |
1999
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| Online Access: | http://ndltd.ncl.edu.tw/handle/64929263210048869115 |