High Performance Circuit Design of SIMD Multiply-Add Instruction for Floating-Point Numbers
碩士 === 國立成功大學 === 資訊工程研究所 === 87 === In this thesis, we present the design of a floating-point multiply-add instruction that can improve greatly the performance of media processors. The proposed instruction adopts the Single Instruction Multiple Data (SIMD) technique, which makes several...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
1999
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| Online Access: | http://ndltd.ncl.edu.tw/handle/85953021974447165884 |