An Analytical Delay Model for Read Operation on Dynamic Random Access Memory Bit Lines
碩士 === 國立中興大學 === 電機工程學系 === 87 === As VLSI circuits migrate to high density, DRAM device technology advances to the deep sub-micron range. The small devices can meet the requirement of the high-speed and high-density, but many other problems degrade circuit performance or even invalidate...
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| Format: | Others |
| Language: | zh-TW |
| Published: |
1999
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| Online Access: | http://ndltd.ncl.edu.tw/handle/85749102405893791140 |