Arcane: Architecture, Design and Implementation of DSP Application Core

碩士 === 中華大學 === 電機工程學系碩士班 === 87 === This thesis describes a 24-bit architecture targeting most digital signal processing (DSP) applications, such as speech, video, image, and communication. The proposed architecture is a reduced instruction set computer. It can be used as a...

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Bibliographic Details
Main Authors: Jenfeng Chung, 鍾仁峰
Other Authors: Chun-Yeh Liu
Format: Others
Language:en_US
Published: 1999
Online Access:http://ndltd.ncl.edu.tw/handle/89759722956551488284