| Summary: | 碩士 === 國立中興大學 === 材料工程學研究所 === 86 === Two-step and three-step anneals were applied systematically to
a set of commer cial Cz silicon wafers. The micro-defects
generated during the anneals were decorated with Wright
solution and investigated by optical microscopy. The ty pe of
micro-defect generated were observed to vary with the time and
tempera ture of the nucleation anneal. Two types of micro-
defects variation patterns were observed. In the A-type
pattern, the dominant type of micro-defects va ried from
cluster precipitates to dispersed precipitates and then to
stacking faults as the nucleation anneal time was increased
; the cluster precipitate s completely disappeared for
samples received a prolonged nucleation anneali ng treatment (
from 4h to 64 h ) , and the high density stacking faults appea
red in the samples that received a still longer nucleation
annealing treatme nt ( from 64h to 128 h ). In the B-type
pattern, significant variation in mic rostructure with
respect to nucleation annealing time did not occur. In the t
wo-step anneals, when nucleation temperature was 750℃or below,
the micro-defe cts variation followed A-type pattern, and
when nucleation temperature was 8 50℃, the micros-defects
variation followed B-type pattern. In the three-ste p anneal
cases, when nucleation temperature was 650℃or below, the
micro-def ects variation patterns followed A-type , and
when nucleation temperature w as 750 ℃or higher, the micro-
defects variation followed B-type pattern. Th ere exists a
transition nucleation temperature which transforms the micro-
defe ct variation from the A-type pattern to the B type
pattern. This transition t emperature is slightly above 750
℃for two-step anneal cases and is above 65 0℃for three-step
anneal cases. A model involves vacancy diffusion and inters
titial annihilation is proposed to explain this phenomenon.
Base on the ox ygen precipitation data extracted from this
research, we suggested an heat tre atment process which can
generate an appropriate amount of oxygen precipitatio n for
integrated circuit manufacturing.
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