A High-Speed Direct Two's-Complement Multiplier with Self-Timed Carry Completion
碩士 === 逢甲大學 === 資訊工程學系 === 86 === An algorithm of a new design for an asynchronous self-timed carry-completion adder is presented. This new type adder can be used for the last array stage of carry-sum addition in the direct two's comp...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
1998
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| Online Access: | http://ndltd.ncl.edu.tw/handle/68099244491782452707 |