Distributed Shared Memory - a VHDL-based Hardware Design

• Main Authors: Cheng, Wen-Nai, 鄭文鼐
• Other Authors: Shao-Wei Leu
• Format: Others
• Language: zh-TW
• Published: 1996
• Online Access: http://ndltd.ncl.edu.tw/handle/61804246062670259079

碩士 === 國立海洋大學 === 電機工程學系 === 84 === The thesis describes the hardware design of a distributed shared memory using hardware description language VHDL. This design is part of an efforttowards constructing a parallel computing environment across a computer network. Our long-term goal is to equip the normal network adaptor used for LANconnection the capability of shared memory across the network subject to the requirement for memory consistency. The implementation for distributed shared memory is directory-based. Each nodemaintains a lookup table which records the status of all memory pagess residing in the local shared memory. Momory consistency is maintained by an ownership protocol. For the successful transmission of memory pages and request along thenetwork, We have designed a packet format of our own under the specification ofthe Ethernet packet. A prototype of our distributed shared memory controller has been designed andtested using VHDL. It will serve as the basis for hardware synthesis in the nextstage of our endeavor.