Distributed Shared Memory - a VHDL-based Hardware Design
碩士 === 國立海洋大學 === 電機工程學系 === 84 === The thesis describes the hardware design of a distributed shared memory using hardware description language VHDL. This design is part of an efforttowards constructing a parallel computing environment ac...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
1996
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| Online Access: | http://ndltd.ncl.edu.tw/handle/61804246062670259079 |