| Summary: | 碩士 === 國立臺灣科技大學 === 工程技術研究所 === 83 === CMOS devices are widely used in digital integrated circuits.
The opetation of these IC''s may be interfered by
electromagnetic interference ( EMI ) .EMI analyses and tests
can provide us the EMI emission and susceptibility information
of equipments.The analysis of conducted or radiated
interference is essential in the design of electromagnetic
compatibility (EMC)。 A study of effects of EMI on CMOS NAND
GATES is presented in this paper.Supposing an EMI signal has
been coupled into a terminal of the CMOS IC ,we have measured
and have simulated, with the aid of the general SPICE sofware,
the EMI susceptibility of CMOS NAND GATES . The DC
characteristics of CMOS NAND GATES under the interference of
different EMI frequencies and powers are analyzed. A method of
prediction the EMI effects on the DC transfer curve is
presented. Moreover,the rise time and fall time of CMOS NAND
GATES are also studied.
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