The Back-Gate Forward Biasing and Switched Source Impedance Techniques for High Performance CMOS Digital Circuits

• Main Authors: Hsing-Pang Lu, 呂鑫邦
• Other Authors: Ming-Jer Chen
• Format: Others
• Language: en_US
• Published: 1995
• Online Access: http://ndltd.ncl.edu.tw/handle/20557639929793240589

碩士 === 國立交通大學 === 電子研究所 === 83 === The major study of this thesis is to investigate and employ the characteristics of a MOS transistor with back gate slightly forward biased. The action of back-gate forward bias can reduce the threshold voltage and thus increase the current drive ability. We introduce a new model concerning the transient switching response and DC characteristics of a CMOS inverter operating in subthreshold region, derived based on a new subthreshold current model. From this model, we can transparently obtain the dependences of the rising and falling times on circuit parameters such as load capacitance, supply voltage, and subthreshold current. Design guildlines can also be drawn for ensuring the circuits operated only in subthreshold.The thesis further intrduces a technique of inserting a switched impedance in order to reduce subthreshold current. As a conquence, the stand-by power consumption of system can be greatly reduced, which is especially important for the digital circuits.We design various circuits with different channel widths in the source impedance switch to find the trade-off between subthreshold current and propagation delay time.